The University of Texas at Austin Job Posting

This posting is Deleted

Engineering Scientist Associate - R and D Communications System Designer

Hiring department Applied Research Lab
Monthly salary $5,666 - $6,500+ depending on qualifications
Hours per week 40.00 Standard from 800AM to 500PM
Posting number 18-04-30-01-4205
Job Status Deleted
FLSA status Exempt
Earliest Start Date Immediately
Position Duration Funding expected to continue
Position open to all applicants
Location Austin - J. J. Pickle Research Campus (North Austin)
Number of vacancies 1
General Notes

An agency designated by the federal government handles the investigation as to the requirement for eligibility for access to classified information. Factors considered during this investigation include but are not limited to allegiance to the U.S., foreign influence, foreign preference, criminal conduct, security violations, drug involvement, the likelihood of continuation of such conduct, etc.

Required Application Materials

  • A Resume is required in order to apply
  • A Letter of Interest is required in order to apply.
  • A List of 3 References is required in order to apply.

Note: The following additional materials are also required for consideration: Trancripts. References must be former employers. Instructions for submission of these materials will be provided at the time the online application has been completed.

Additional Information


Design, develop, and test signal processing and control software, firmware, and FPGA designs for radio frequency communications systems and sub-systems.

Essential Functions

Work as a member of a development team for the design, integration, and testing of signal processing software, firmware, and FPGA designs for digital wireless and wired communication system and related sub-systems. Development and test of software and/or firmware related to successful implementation and integration of signal processing software/firmware/FPGA elements. Testing in both laboratory and field environments of hardware in either partial subsystems or full system and simulate relevant elements in the system. Documentation of all drawings, hardware, and software developed. Provide information about designs and tests to other team members both at ARL and other organizations. Preparation of presentations of results, designs, or other related aspects of system design to both internal and external project directors as required by supervisor.

Marginal/Incidental functions

Other related functions as assigned.

Required qualifications

Bachelor's degree in Electrical Engineering with experience in digital signal processing for communications. Familiarity with FPGA programming (VHDL or Verilog) and debug. Knowledge of Matlab or similar development software. Interest in mixed-signal FPGA design (Digital interfaces to ADCs, DACs, etc.). Basic knowledge of embedded programming in C/C++. Basic knowledge of digital modulation, demodulation, equalization, FFTs, etc. Basic familiarity with DMM, oscilloscope and signal generators. Knowledge of design and troubleshooting of electronic circuits at the component level. US Citizen: Applicant selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information at the level appropriate to the project requirements of the position. Evidence of skills in the following areas: working with new technologies, being highly organized, planning and coordinating multiple tasks, effective time management, attention to detail, effective problem solving skills, using excellent judgment, working independently with sensitive and confidential information, and maintaining a professional demeanor.

Preferred Qualifications

MS in EE with core work in communications. Experience in a team-oriented engineering research and development environment. At least 3 years of work experience with FPGA programming (VHDL) and debug. Experience with MATLAB or similar prototyping and simulation software. Experience with mixed signal FPGA design (Digital interfaces to ADCs, DACs, etc.). Working knowledge of digital modulation, demodulation, equalization, FFTs, etc. Experience implementing communication systems functions in FPGA HDL. At least 1 year of experience with embedded software design in C or C++. Experience with Xilinx FPGAs and tools (ISE, Vivado, etc.). Three years or more experience with using DMM, oscilloscopes, logic analyzers, spectrum analyzers, signal generators, etc. Cumulative GPA of 3.0.

Working conditions

May work around standard office conditions Repetitive use of a keyboard at a workstation Use of manual dexterity Some weekend, evening and holiday work. Frequent use of manuals and books. May work in shared, windowless office space. Possible intrastate/interstate travel.

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